/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20200925 (64-bit version)
* Copyright (c) 2000 - 2020 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
* Disassembly of iASLuu5c4b.aml, Mon Jun 12 06:31:17 2023
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000019DF (6623)
* Revision 0x02
* Checksum 0x2B
* OEM ID "ALASKA"
* OEM Table ID "MSI-Z87i"
* OEM Revision 0x00000005 (5)
* Compiler ID "INTL"
* Compiler Version 0x20200925 (538970405)
*/
DefinitionBlock ("", "DSDT", 2, "ALASKA", "MSI-Z87i", 0x00000005)
{
Name (_STR, Unicode ("MSI Z87i (MS-7851), (c)apalych")) // _STR: Description String
Scope (_PR)
{
Processor (CPU0, 0x01, 0x00001810, 0x06){}
Processor (CPU1, 0x02, 0x00001810, 0x06){}
Processor (CPU2, 0x03, 0x00001810, 0x06){}
Processor (CPU3, 0x04, 0x00001810, 0x06){}
Processor (CPU4, 0x05, 0x00001810, 0x06){}
Processor (CPU5, 0x06, 0x00001810, 0x06){}
Processor (CPU6, 0x07, 0x00001810, 0x06){}
Processor (CPU7, 0x08, 0x00001810, 0x06){}
}
Scope (_SB)
{
Device (EC)
{
Name (_HID, "ACID0001") // _HID: Hardware ID
Name (_STA, 0x0F) // _STA: Status
}
Device (H_EC)
{
Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Name (_STA, Zero) // _STA: Status
}
Device (MEM2)
{
Name (_HID, EisaId ("PNP0C01") /* System Board */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Name (_STA, Zero) // _STA: Status
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
0x20000000, // Address Base
0x00200000, // Address Length
)
Memory32Fixed (ReadWrite,
0x40004000, // Address Base
0x00001000, // Address Length
)
})
}
Device (HPET)
{
Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0C01") /* System Board */) // _CID: Compatible ID
Name (_STA, 0x0F) // _STA: Status
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IRQNoFlags ()
{0,8}
Memory32Fixed (ReadWrite,
0xFED00000, // Address Base
0x00000400, // Address Length
)
})
}
Device (RTC)
{
Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID
Name (_STA, 0x0F) // _STA: Status
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x01, // Alignment
0x08, // Length
)
})
}
Device (PWRB)
{
Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0C0E") /* Sleep Button Device */) // _CID: Compatible ID
Name (_STA, 0x0B) // _STA: Status
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x1D,
0x03
})
}
Device (PNLF)
{
Name (_HID, EisaId ("APP0002")) // _HID: Hardware ID
Name (_CID, "backlight") // _CID: Compatible ID
Name (_UID, 0x0AD9) // _UID: Unique ID
Name (_STA, 0x0B) // _STA: Status
}
Device (PS2K)
{
Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP030B")) // _CID: Compatible ID
Name (_STA, Zero) // _STA: Status
}
Device (PS2M)
{
Name (_HID, EisaId ("PNP0F03") /* Microsoft PS/2-style Mouse */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _CID: Compatible ID
Name (_STA, Zero) // _STA: Status
}
Device (USBW)
{
Name (_HID, "PNP0D10" /* XHCI USB Controller with debug */) // _HID: Hardware ID
Name (_UID, "WAKE") // _UID: Unique ID
Name (_STA, Zero) // _STA: Status
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0D,
0x04
})
}
}
Device (_SB.PCI0)
{
Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
Name (_ADR, Zero) // _ADR: Address
Name (_BBN, Zero) // _BBN: BIOS Bus Number
Name (_UID, Zero) // _UID: Unique ID
Name (_STA, 0x0F) // _STA: Status
OperationRegion (GNVS, SystemMemory, 0xD8E33C18, 0x02B2)
Field (GNVS, AnyAcc, Lock, Preserve)
{
Offset (0x70),
OSCC, 8,
NEXP, 8,
Offset (0xC0),
XHCI, 8
}
Name (SUPP, Zero)
Name (CTRL, Zero)
Name (XCNT, Zero)
Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities
{
Local0 = Arg3
CreateDWordField (Local0, Zero, CDW1)
CreateDWordField (Local0, 0x04, CDW2)
CreateDWordField (Local0, 0x08, CDW3)
^XHC.POSC (Arg1, Arg2, Arg3)
If ((XCNT == Zero))
{
^XHC.XSEL ()
XCNT++
}
If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))
{
SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
If ((NEXP == Zero))
{
CTRL &= 0xFFFFFFF8
}
If (NEXP)
{
If (~(CDW1 & One))
{
If ((CTRL & One))
{
^RP00.HPEX = Zero
^RP02.HPEX = Zero
^RP03.HPEX = Zero
^RP04.HPEX = Zero
^RP00.HPSX = One
^RP02.HPSX = One
^RP03.HPSX = One
^RP04.HPSX = One
}
If ((CTRL & 0x04))
{
^RP00.PMEX = Zero
^RP02.PMEX = Zero
^RP03.PMEX = Zero
^RP04.PMEX = Zero
^RP00.PMSX = One
^RP02.PMSX = One
^RP03.PMSX = One
^RP04.PMSX = One
}
}
}
If ((Arg1 != One))
{
CDW1 |= 0x08
}
If ((CDW3 != CTRL))
{
CDW1 |= 0x10
}
CDW3 = CTRL /* \_SB_.PCI0.CTRL */
OSCC = CTRL /* \_SB_.PCI0.CTRL */
Return (Local0)
}
Else
{
CDW1 |= 0x04
Return (Local0)
}
}
Device (MCHC)
{
Name (_ADR, Zero) // _ADR: Address
}
Device (IMEI)
{
Name (_ADR, 0x00160000) // _ADR: Address
}
Device (PEGP)
{
Name (_ADR, 0x00010000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
Device (GFX0)
{
Name (_ADR, Zero) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
}
Device (HDAX)
{
Name (_ADR, One) // _ADR: Address
}
}
Device (IGPU)
{
Name (_ADR, 0x00020000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
}
Device (HDAU)
{
Name (_ADR, 0x00030000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0D,
0x04
})
}
Device (HDEF)
{
Name (_ADR, 0x001B0000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0D,
0x04
})
OperationRegion (HDAR, PCI_Config, 0x4C, 0x10)
Field (HDAR, WordAcc, NoLock, Preserve)
{
Offset (0x09),
PMEE, 1,
, 6,
PMES, 1
}
}
Device (RP00)
{
Name (_ADR, 0x001C0000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Device (EXP1)
{
Name (_ADR, Zero) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
}
}
Device (RP02)
{
Name (_ADR, 0x001C0002) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Device (LAN1)
{
Name (_ADR, Zero) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
}
}
Device (RP03)
{
Name (_ADR, 0x001C0003) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Device (LAN2)
{
Name (_ADR, Zero) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
}
}
Device (RP04)
{
Name (_ADR, 0x001C0004) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
OperationRegion (PXCS, PCI_Config, Zero, 0x0380)
Field (PXCS, AnyAcc, NoLock, Preserve)
{
Offset (0xD8),
, 30,
HPEX, 1,
PMEX, 1
}
Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0xDC),
, 30,
HPSX, 1,
PMSX, 1
}
Device (ARPT)
{
Name (_ADR, Zero) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
}
}
Device (SATA)
{
Name (_ADR, 0x001F0002) // _ADR: Address
Method (_HPP, 0, NotSerialized) // _HPP: Hot Plug Parameters
{
Return (Package (0x04)
{
0x08,
0x40,
One,
Zero
})
}
Device (PRT0)
{
Name (_ADR, Zero) // _ADR: Address
}
Device (PRT1)
{
Name (_ADR, One) // _ADR: Address
}
Device (PRT2)
{
Name (_ADR, 0x02) // _ADR: Address
}
Device (PRT3)
{
Name (_ADR, 0x03) // _ADR: Address
}
}
Device (LPCB)
{
Name (_ADR, 0x001F0000) // _ADR: Address
}
Device (SBUS)
{
Name (_ADR, 0x001F0003) // _ADR: Address
}
}
Scope (_SB.PCI0)
{
OperationRegion (RCRG, SystemMemory, 0xFED1F418, One)
Field (RCRG, DWordAcc, Lock, Preserve)
{
, 13,
EH2D, 1,
, 1,
EH1D, 1
}
Name (_STR, Unicode ("EHCI OFF")) // _STR: Description String
Method (_INI, 0, NotSerialized) // _INI: Initialize
{
EH1D = One
EH2D = One
}
Device (XHC)
{
Name (_ADR, 0x00140000) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_S3D, 0x02) // _S3D: S3 Device State
Name (_S4D, 0x02) // _S4D: S4 Device State
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0D,
0x04
})
OperationRegion (^LPCB.LPCX, PCI_Config, Zero, 0x0100)
Field (^LPCB.LPCX, AnyAcc, NoLock, Preserve)
{
Offset (0x02),
CDID, 16,
Offset (0xAE),
XUSB, 1
}
OperationRegion (XPRT, PCI_Config, Zero, 0x0100)
Field (XPRT, AnyAcc, NoLock, Preserve)
{
DVID, 16,
Offset (0x74),
D0D3, 2,
Offset (0x75),
PMEE, 1,
, 6,
PMES, 1,
Offset (0xB0),
, 13,
MB13, 1,
MB14, 1,
Offset (0xD0),
PR2, 32,
PR2M, 32,
PR3, 32,
PR3M, 32
}
OperationRegion (XHCP, SystemMemory, 0xF80A0000, 0x0100)
Field (XHCP, AnyAcc, Lock, Preserve)
{
Offset (0x04),
PDBM, 16,
Offset (0x10),
MEMB, 64
}
Name (XRST, Zero)
Name (PCHS, One)
Method (_PS0, 0, Serialized) // _PS0: Power State 0
{
If ((DVID == 0xFFFF))
{
Return (Zero)
}
Local2 = MEMB /* \_SB_.PCI0.XHC_.MEMB */
Local1 = PDBM /* \_SB_.PCI0.XHC_.PDBM */
PDBM &= 0xFFFFFFFFFFFFFFF9
Local3 = D0D3 /* \_SB_.PCI0.XHC_.D0D3 */
D0D3 = Zero
MEMB = 0xF7FE0000
PDBM = (Local1 | 0x02)
OperationRegion (MCA1, SystemMemory, 0xF7FE0000, 0x9000)
Field (MCA1, DWordAcc, Lock, Preserve)
{
Offset (0x510),
PSC1, 32,
Offset (0x520),
PSC2, 32,
Offset (0x530),
PSC3, 32,
Offset (0x540),
PSC4, 32,
Offset (0x80E0),
, 15,
AX15, 1,
Offset (0x8154),
, 31,
CLK2, 1,
Offset (0x816C),
, 2,
CLK0, 1,
, 11,
CLK1, 1
}
If ((PCHS == 0x02))
{
MB13 = Zero
MB14 = Zero
CLK0 = Zero
CLK1 = Zero
}
CLK2 = One
If ((PCHS == 0x02))
{
While (((((PSC1 & 0x03F8) == 0x02E0) || ((PSC2 &
0x03F8) == 0x02E0)) || (((PSC3 & 0x03F8) == 0x02E0) || ((PSC4 &
0x03F8) == 0x02E0))))
{
Stall (0x0A)
}
Local4 = Zero
Local0 = (PSC1 & 0xFFFFFFFFFFFFFFFD)
If (((Local0 & 0x000203F9) == 0x02A0))
{
PSC1 = (Local0 | 0x80000000)
Local4 |= One
}
Local0 = (PSC2 & 0xFFFFFFFFFFFFFFFD)
If (((Local0 & 0x000203F9) == 0x02A0))
{
PSC2 = (Local0 | 0x80000000)
Local4 |= 0x02
}
Local0 = (PSC3 & 0xFFFFFFFFFFFFFFFD)
If (((Local0 & 0x000203F9) == 0x02A0))
{
PSC3 = (Local0 | 0x80000000)
Local4 |= 0x04
}
Local0 = (PSC4 & 0xFFFFFFFFFFFFFFFD)
If (((Local0 & 0x000203F9) == 0x02A0))
{
PSC4 = (Local0 | 0x80000000)
Local4 |= 0x08
}
If (Local4)
{
Sleep (0x65)
If ((Local4 & One))
{
Local0 = (PSC1 & 0xFFFFFFFFFFFFFFFD)
PSC1 = (Local0 | 0x00FE0000)
}
If ((Local4 & 0x02))
{
Local0 = (PSC2 & 0xFFFFFFFFFFFFFFFD)
PSC2 = (Local0 | 0x00FE0000)
}
If ((Local4 & 0x04))
{
Local0 = (PSC3 & 0xFFFFFFFFFFFFFFFD)
PSC3 = (Local0 | 0x00FE0000)
}
If ((Local4 & 0x08))
{
Local0 = (PSC4 & 0xFFFFFFFFFFFFFFFD)
PSC4 = (Local0 | 0x00FE0000)
}
}
AX15 = One
}
PDBM &= 0xFFFFFFFFFFFFFFFD
MEMB = Local2
PDBM = Local1
}
Method (_PS3, 0, Serialized) // _PS3: Power State 3
{
If ((DVID == 0xFFFF))
{
Return (Zero)
}
PMES = One
PMEE = One
Local2 = MEMB /* \_SB_.PCI0.XHC_.MEMB */
Local1 = PDBM /* \_SB_.PCI0.XHC_.PDBM */
PDBM &= 0xFFFFFFFFFFFFFFF9
MEMB = 0xF7FE0000
PDBM |= 0x02
OperationRegion (MCA1, SystemMemory, 0xF7FE0000, 0x9000)
Field (MCA1, DWordAcc, Lock, Preserve)
{
Offset (0x80E0),
, 15,
AX15, 1,
Offset (0x8154),
, 31,
CLK2, 1,
Offset (0x816C),
, 2,
CLK0, 1,
, 11,
CLK1, 1
}
Local3 = D0D3 /* \_SB_.PCI0.XHC_.D0D3 */
If ((Local3 == 0x03))
{
D0D3 = Zero
}
If ((PCHS == 0x02))
{
MB13 = One
MB14 = One
CLK0 = One
CLK1 = One
}
CLK2 = Zero
If ((PCHS == 0x02))
{
AX15 = Zero
}
If ((Local3 == 0x03))
{
D0D3 = 0x03
}
PDBM &= 0xFFFFFFFFFFFFFFFD
MEMB = Local2
PDBM = Local1
}
Method (POSC, 3, Serialized)
{
CreateDWordField (Arg2, Zero, CDW1)
CreateDWordField (Arg2, 0x08, CDW3)
If ((XHCI == Zero))
{
CDW1 |= 0x02
}
If (!(CDW1 & One))
{
If ((CDW3 & One))
{
If (((XHCI == 0x02) || (XHCI == 0x03)))
{
PR3 &= 0xFFFFFFC0
PR2 &= 0xFFFF8000
XUSB = Zero
XRST = Zero
}
}
ElseIf (((CDID & 0xF000) == 0x8000))
{
If ((Arg0 > One))
{
XSEL ()
}
Else
{
CDW1 |= 0x0A
}
}
ElseIf ((Arg0 > 0x02))
{
XSEL ()
}
Else
{
CDW1 |= 0x0A
}
}
Return (Arg2)
}
Method (XSEL, 0, Serialized)
{
If (((XHCI == 0x02) || (XHCI == 0x03)))
{
XUSB = One
XRST = One
Local0 = Zero
Local0 = (PR3 & 0xFFFFFFC0)
PR3 = (Local0 | PR3M) /* \_SB_.PCI0.XHC_.PR3M */
Local0 = Zero
Local0 = (PR2 & 0xFFFF8000)
PR2 = (Local0 | PR2M) /* \_SB_.PCI0.XHC_.PR2M */
}
}
Method (XWAK, 0, Serialized)
{
If (((XUSB == One) || (XRST == One)))
{
XSEL ()
}
}
Device (RHUB)
{
Name (_ADR, Zero) // _ADR: Address
Device (HS01)
{
Name (_ADR, One) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (HS02)
{
Name (_ADR, 0x02) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (HS05)
{
Name (_ADR, 0x05) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (HS06)
{
Name (_ADR, 0x06) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (HS07)
{
Name (_ADR, 0x07) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (HS08)
{
Name (_ADR, 0x08) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (HS09)
{
Name (_ADR, 0x09) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (HS10)
{
Name (_ADR, 0x0A) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (HS11)
{
Name (_ADR, 0x0B) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (SSP1)
{
Name (_ADR, 0x10) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (SSP2)
{
Name (_ADR, 0x11) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (SSP3)
{
Name (_ADR, 0x12) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (SSP4)
{
Name (_ADR, 0x13) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (SSP5)
{
Name (_ADR, 0x14) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
Device (SSP6)
{
Name (_ADR, 0x15) // _ADR: Address
Name (_STA, 0x0F) // _STA: Status
Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
{
0xFF,
0x03,
Zero,
Zero
})
}
}
}
}
Scope (_SB.PCI0)
{
OperationRegion (HBUS, PCI_Config, Zero, 0x0100)
Field (HBUS, DWordAcc, NoLock, Preserve)
{
Offset (0x40),
EPEN, 1,
Offset (0x80),
, 4,
PM0H, 2,
Offset (0x81),
PM1L, 2,
, 2,
PM1H, 2,
Offset (0x82),
PM2L, 2,
, 2,
PM2H, 2,
Offset (0x83),
PM3L, 2,
, 2,
PM3H, 2,
Offset (0x84),
PM4L, 2,
, 2,
PM4H, 2,
Offset (0x85),
PM5L, 2,
, 2,
PM5H, 2,
Offset (0x86),
PM6L, 2,
, 2,
PM6H, 2,
Offset (0xBC),
, 20,
TLUD, 12
}
OperationRegion (MCHT, SystemMemory, 0xFED10000, 0x1100)
Name (BUF0, ResourceTemplate ()
{
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
0x0000, // Granularity
0x0000, // Range Minimum
0x00FF, // Range Maximum
0x0000, // Translation Offset
0x0100, // Length
,, _Y00)
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000000, // Range Minimum
0x00000CF7, // Range Maximum
0x00000000, // Translation Offset
0x00000CF8, // Length
,, , TypeStatic, DenseTranslation)
IO (Decode16,
0x0CF8, // Range Minimum
0x0CF8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000D00, // Range Minimum
0x0000FFFF, // Range Maximum
0x00000000, // Translation Offset
0x0000F300, // Length
,, , TypeStatic, DenseTranslation)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000A0000, // Range Minimum
0x000BFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00020000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C0000, // Range Minimum
0x000C3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y01, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C4000, // Range Minimum
0x000C7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y02, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C8000, // Range Minimum
0x000CBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y03, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000CC000, // Range Minimum
0x000CFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y04, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D0000, // Range Minimum
0x000D3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y05, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D4000, // Range Minimum
0x000D7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y06, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D8000, // Range Minimum
0x000DBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y07, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000DC000, // Range Minimum
0x000DFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y08, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E0000, // Range Minimum
0x000E3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y09, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E4000, // Range Minimum
0x000E7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y0A, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E8000, // Range Minimum
0x000EBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y0B, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000EC000, // Range Minimum
0x000EFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y0C, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000F0000, // Range Minimum
0x000FFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00010000, // Length
,, _Y0D, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x00000000, // Range Minimum
0xFEAFFFFF, // Range Maximum
0x00000000, // Translation Offset
0xFEB00000, // Length
,, _Y0E, AddressRangeMemory, TypeStatic)
})
Name (PELN, 0x04000000)
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
CreateWordField (BUF0, \_SB.PCI0._Y00._MAX, PBMX) // _MAX: Maximum Base Address
PBMX = ((PELN >> 0x14) - 0x02)
CreateWordField (BUF0, \_SB.PCI0._Y00._LEN, PBLN) // _LEN: Length
PBLN = ((PELN >> 0x14) - One)
If (PM1L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C0LN) // _LEN: Length
C0LN = Zero
}
If ((PM1L == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C0RW) // _RW_: Read-Write Status
C0RW = Zero
}
If (PM1H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C4LN) // _LEN: Length
C4LN = Zero
}
If ((PM1H == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C4RW) // _RW_: Read-Write Status
C4RW = Zero
}
If (PM2L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, C8LN) // _LEN: Length
C8LN = Zero
}
If ((PM2L == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y03._RW, C8RW) // _RW_: Read-Write Status
C8RW = Zero
}
If (PM2H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, CCLN) // _LEN: Length
CCLN = Zero
}
If ((PM2H == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y04._RW, CCRW) // _RW_: Read-Write Status
CCRW = Zero
}
If (PM3L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D0LN) // _LEN: Length
D0LN = Zero
}
If ((PM3L == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D0RW) // _RW_: Read-Write Status
D0RW = Zero
}
If (PM3H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D4LN) // _LEN: Length
D4LN = Zero
}
If ((PM3H == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D4RW) // _RW_: Read-Write Status
D4RW = Zero
}
If (PM4L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, D8LN) // _LEN: Length
D8LN = Zero
}
If ((PM4L == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y07._RW, D8RW) // _RW_: Read-Write Status
D8RW = Zero
}
If (PM4H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, DCLN) // _LEN: Length
DCLN = Zero
}
If ((PM4H == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y08._RW, DCRW) // _RW_: Read-Write Status
DCRW = Zero
}
If (PM5L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E0LN) // _LEN: Length
E0LN = Zero
}
If ((PM5L == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E0RW) // _RW_: Read-Write Status
E0RW = Zero
}
If (PM5H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E4LN) // _LEN: Length
E4LN = Zero
}
If ((PM5H == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E4RW) // _RW_: Read-Write Status
E4RW = Zero
}
If (PM6L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, E8LN) // _LEN: Length
E8LN = Zero
}
If ((PM6L == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, E8RW) // _RW_: Read-Write Status
E8RW = Zero
}
If (PM6H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, ECLN) // _LEN: Length
ECLN = Zero
}
If ((PM6H == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, ECRW) // _RW_: Read-Write Status
ECRW = Zero
}
If (PM0H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, F0LN) // _LEN: Length
F0LN = Zero
}
If ((PM0H == One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0D._RW, F0RW) // _RW_: Read-Write Status
F0RW = Zero
}
CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M1MN) // _MIN: Minimum Base Address
CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M1MX) // _MAX: Maximum Base Address
CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M1LN) // _LEN: Length
M1MN = (TLUD << 0x14)
M1LN = ((M1MX - M1MN) + One)
Return (BUF0) /* \_SB_.PCI0.BUF0 */
}
Name (_PRT, Package (0x1B) // _PRT: PCI Routing Table
{
Package (0x04)
{
0x001FFFFF,
Zero,
Zero,
0x15
},
Package (0x04)
{
0x001FFFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0x001FFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x001FFFFF,
0x03,
Zero,
0x10
},
Package (0x04)
{
0x0014FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001DFFFF,
Zero,
Zero,
0x17
},
Package (0x04)
{
0x001AFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001BFFFF,
Zero,
Zero,
0x16
},
Package (0x04)
{
0x0019FFFF,
Zero,
Zero,
0x14
},
Package (0x04)
{
0x0016FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0016FFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0x0016FFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x0016FFFF,
0x03,
Zero,
0x11
},
Package (0x04)
{
0x001CFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001CFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0x001CFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x001CFFFF,
0x03,
Zero,
0x13
},
Package (0x04)
{
0x0001FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0001FFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0x0001FFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x0001FFFF,
0x03,
Zero,
0x13
},
Package (0x04)
{
0x0003FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0004FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0004FFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0x0004FFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x0004FFFF,
0x03,
Zero,
0x13
},
Package (0x04)
{
0x0002FFFF,
Zero,
Zero,
0x10
}
})
Name (PEGP._PRT, Package (0x04) // _PRT: PCI Routing Table
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
Name (RP00._PRT, Package (0x04) // _PRT: PCI Routing Table
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
Name (RP02._PRT, Package (0x04) // _PRT: PCI Routing Table
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x11
}
})
Name (RP03._PRT, Package (0x04) // _PRT: PCI Routing Table
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x12
}
})
Name (RP04._PRT, Package (0x04) // _PRT: PCI Routing Table
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
}
Scope (_GPE)
{
Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
{
Notify (\_SB.PCI0.IGPU, 0x02) // Device Wake
Notify (\_SB.PCI0.PEGP, 0x02) // Device Wake
Notify (\_SB.PCI0.PEGP.GFX0, 0x02) // Device Wake
Notify (\_SB.PCI0.RP00, 0x02) // Device Wake
Notify (\_SB.PCI0.RP00.EXP1, 0x02) // Device Wake
Notify (\_SB.PCI0.RP02, 0x02) // Device Wake
Notify (\_SB.PCI0.RP02.LAN1, 0x02) // Device Wake
Notify (\_SB.PCI0.RP03, 0x02) // Device Wake
Notify (\_SB.PCI0.RP03.LAN2, 0x02) // Device Wake
Notify (\_SB.PCI0.RP04, 0x02) // Device Wake
Notify (\_SB.PCI0.RP04.ARPT, 0x02) // Device Wake
}
Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
{
Notify (\_SB.USBW, 0x02) // Device Wake
\_SB.PCI0.XHC.PMES = One
Notify (\_SB.PCI0.XHC, 0x02) // Device Wake
Notify (\_SB.PCI0.HDEF, 0x02) // Device Wake
Notify (\_SB.PCI0.HDAU, 0x02) // Device Wake
}
Method (_L1D, 0, NotSerialized) // _Lxx: Level-Triggered GPE, xx=0x00-0xFF
{
Notify (\_SB.PWRB, 0x02) // Device Wake
}
}
OperationRegion (SLPR, SystemIO, 0x1830, 0x08)
Field (SLPR, ByteAcc, NoLock, Preserve)
{
, 4,
SLPE, 1,
, 31,
SLPX, 1
}
Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep
{
SLPE = One
SLPX = One
}
Method (_WAK, 1, Serialized) // _WAK: Wake
{
\_SB.PCI0.XHC.XWAK ()
SLPE = Zero
SLPX = Zero
Notify (\_SB.PWRB, 0x02) // Device Wake
Return (Package (0x02)
{
Zero,
Zero
})
}
Name (_S0, Package (0x04) // _S0_: S0 System State
{
Zero,
Zero,
Zero,
Zero
})
Name (_S3, Package (0x04) // _S3_: S3 System State
{
0x05,
Zero,
Zero,
Zero
})
Name (_S4, Package (0x04) // _S4_: S4 System State
{
0x06,
Zero,
Zero,
Zero
})
Name (_S5, Package (0x04) // _S5_: S5 System State
{
0x07,
Zero,
Zero,
Zero
})
}
